A severe problem in VLSI analog electronic circuit design is that large time constants require high values of R (the resistors) and/or C (the capacitors), both of which occupy large areas in the chip. Prior attempts to address this problem have not yet found a good compromise between the need for large time constants and the need for miniaturization. The most relevant is the switched capacitor technology, which provides an equivalent resistor with a clock and a capacitor.
The mixed-signal, electronic circuit component market is the interface between the analog and the digital-worlds of today""s instrumentation. Although analog signal processing has lost market share with the advent of the digital computer, there still exists a need to interface instruments and sensors to the real world. This interface is the mixed-signal domain. One of the goals of the mixed-signal circuits is to operate within the constraints being imposed by the digital electric circuits.
Large-scale integration in mixed-signal circuits is not always possible due to the physical limitations of the technology and the size of the dies. Time constants of milliseconds require capacitor or resistor sizes that do not fit the size of VLSI circuits. Since circuitry to meet these time constant requirements take too much area, one of the components is often placed external to the chip. The approach needs chip-pins to the exterior, and carries with it extra components and complexity to the board design. Furthermore, those extra pins mean bigger and more expensive packaging.
In most analog VLSI circuits, the capacitors that can be built are rather small (in the order of tens of pF). This can create a problem whenever large time constants (in the milliseconds or longer) are required. Man-made or naturally occurring signals are very often slowly varying, and require filters with low cut-off frequencies or, equivalently, with large time constants. For instance, the A/C power oscillates 60 times a second. We have running in our University of Florida laboratory a VLSI Filter and Hold (FandH) circuit implemented in subthreshold mode, using very low bias currents, with a cutoff lower the A/C power line frequency.
The subject invention pertains to a method and circuit design particularly useful for long time constant RC active or passive filters in either continuous or discrete time domains. The subject invention can find advantage in the mixed-signal, electronic circuit component market. The subject invention widens the application and the price/performance ratio of VLSI analog electronic circuits, and can be easily included in conventional circuit designs.
The subject invention can address the need for large time constants by, for example, multiplying the capacitor value by the inverse of the duty-cycle. In this manner time constants on the order of few seconds can be achieved with small capacitors. This provides a simpler solution than in the past. In addition, a broad set of continuous time active filtering topologies can be used to implement a FandH with minor changes. Very low power systems can also be implemented with the subject technology. Most of the sampled systems have to comply with speed requirements, i.e., the capacitors have to be charged as fast as possible, often requiring large currents. In the subject Filter and Hold (FandH) system, the integration operation of a capacitor is an intrinsic part of the system since the switching of capacitor current can provide the scaling ability.
The subject Filter and Hold (FandH) technology can share one or more of the analog active filter characteristics. In general, analog, continuous-time filter implementations render simpler and smaller circuits than other designs based on sampling (such as switch capacitor and switch current). In this respect the subject invention provides the following benefits: area efficiency;
auxiliary circuits are simple;
time constants can be trimmed both by controlling the equivalent resistor value as well as the value of k, the product of the duration of the sampling pulse and its frequency of occurrence;
low power implementations are possible; and
very long time constants are achievable.
The subject invention can avoid many of the problems associated with large-scale integration in mixed-signal circuits. With the subject invention, full VLSI integration is possible for a broader class of low frequency signals, for example, 60 Hz (50 Hz in Europe) notch filters. These filters are required for many applications ranging from instrumentation, sensing of biological signals, telecommunications circuits, the exploding micro electrical mechanical (MEM) devices, and the emerging intelligent sensor markets. The subject invention can also be applied to machine learning computation in order to, for example, create associate memories and/or store information.
The subject invention can enable miniaturization of mixed-signal circuits to a level not possible before. This can decrease price and power consumption, improve reliability, shape factors, and enable new functionality. Intelligent sensors attempt to put together the sensor and the signal processing in the same dye. Intelligent sensors can require front-end signal processing with strict constraints of low power and small size, which can be implemented with the subject invention.
Advantageously, the method and apparatus of the subject invention can be compatible with different integration techniques such as Bipolar, BICMOS, or CMOS as long as continuous-time filtering design is possible. A specific application of the subject Filter and Hold (FandH) technology is circuits which accept analog signals of low frequency content (the so-called mixed-signal circuits), particularly in portable systems with low power requirements such as biomedical instrumentation, 60 Hz (50 Hz) notch filters, audio, and so on. The subject invention can also be used in high frequency applications.